1. Field of the Invention
This invention relates to a method for fabricating a complementary metal oxide semiconductor (CMOS) image sensor, and more particularly, to a method for fabricating a CMOS image sensor that resolves the abnormally elevated output at the first pixel of the CMOS image sensor.
2. Description of Related Art
A complementary metal oxide semiconductor (CMOS) image sensor, an image-sensing module consisting, of several chips, is generally used in electronic devices such as a scanner and a fax machine wherein each of the chips contains a number of pixels. Conventionally, the layout of the chips for composing the image-sensing module on a wafer is shown in FIG. 1 wherein each of the chips contains, for example, 96 pixels. Referring to FIG. 1, every chip 100 contains 96 pixels 101, wherein every chip 100 are separated from the neighboring chip 100 by a scribe line 102, and wherein the pixels are separated from each other by a separation 103. After the fabrication process on the wafer is accomplished, the chips 100 have to be sectioned from the wafer by cutting along the scribe line 102, and then, used to compose an image-sensing module. For an image-sensing module, the separations 103 between pixels 101 are required to be even, that is, the separation between two pixels on the near ends of two neighboring chips has to equal to the separation 103. Therefore, it is not allowed to lay a seal ring on the chip because the seal ring occupies a extra space on the edge of each chip 100, and further increases the separation between two pixels on the near ends of two neighboring chips. Without the presence of a seal ring, a peeling problem caused by the difference of step height often occurs along the edge of a photoresist layer formed on the wafer. As a result a portion of the field oxide (FOX) layer under the peeled photoresist layer tends toward being damaged by an etching process. The damaged field oxide layer on the cut edge of each chip further causes defects including lacking of insulation over the substrate, and undesired connection between the substrate and metal layers. Therefore, an abnormal elevated output happens on the first pixel of a chip because of the foregoing defects.
A schematic cross-sectional view showing the structure of the first pixel on a chip composing a conventional COMS image sensor is shown in FIG. 2. FIG. 3 is a partially detailed schematic cross-sectional view showing the defects occurs at the first pixel that cause an abnormally elevated output.
In FIG. 2, a heavy doped P-type region 203 works as depletion located on a N-type substrate 200. Besides, the N-type substrate 200 contains P-well 201, field oxide 202. N-type heavy doped regions 204 and 205, dielectric layer 206, and conducting layer 207. The first pixel 208 consists of devices between two field oxide layers 202. The region to the left of the dash line 209 is reserved as the scribe line.
Referring to FIG. 3, which is a partially detailed view of the area 210 in FIG. 2, a portion of the field oxide 202 is removed by an etching process to form unwanted space between the field oxide and the edge of the first pixel, because of the peeling of the photoresist layer. Hence, an undesired connection between the metal layer 212 formed by a follow-up metalization process and the substrate 200 occurs.
According to the foregoing, the field oxide on the edge of the first pixel next to the scribe line of each chip cannot provide sufficient insulation, so the undesired connections between the substrate under the field oxide and a conducting layer lead to a abnormally elevated output at the first pixel.